1. Field of the Invention
The invention relates to input/output devices for ESD protection in an integrated circuit, and in particular to input/output devices that evenly discharge ESD current during an ESD event.
2. Description of the Related Art
ESD (electrostatic discharge) damage to IC products has become an essential reliability issue among others. As feature size is scaled down to deep sub-micro, the gate oxide of a MOS transistor becomes thinner to render ICs more vulnerable to ESD stress. Industrial standards require input/output (I/O) pins to pass ESD tests of 2000 volts of human body mode (HBM) and 200 volts of machine mode (MM). Generally, ESD protection devices are placed near I/O pads, protecting not only I/O circuits but also core circuits from ESD damage. In order to have enough ESD protection ability, ESD protection devices usually are of a large layout area, thereby dissipating the heat generated during an ESD event and protecting themselves from being burned out. MOS transistors are sometimes utilized for this ESD protection purpose because the parasitic bipolar junction transistor (BJT) under a gate of a MOS transistor might be turned or triggered on during an ESD event. Finger-type MOS transistors, each having multiple parallel finger gates and common sources/drains between adjacent finger gates, are preferred due to their compact size in comparison with others. While providing ESD protection, a finger-type MOS transistor can also act as a post driver in an I/O circuit, which is the final driving stage in an I/O circuit to drive an input port of an external IC. A finger-type MOS transistor, when all finger gates are driven, can provide plenty of driving force to drive the loading effectively rendered by an external IC. The specification of an I/O circuit, depending on a product requirement, may not need the full driving force of a finger-type MOS transistor, nevertheless. If less driving ability is required, some of the finger gates may be coupled to a fixed voltage, such as Vcc or Vss (GND), to stop acting like a driver and others of the finger gates may be controlled by a signal to drive accordingly.
FIG. 1 shows a portion of a conventional I/O circuit. There are a finger-type NMOS transistor and a finger-type PMOS transistor in FIG. 1. The finger-type NMOS consists of NMOS transistors (NMOS1-NMOSn), each representing one finger gate and two sources/drains adjacent to the finger gate in the finger-type NMOS transistor. Similarly, the finger-type PMOS transistor consists of PMOS transistors (PMOS1-PMOSn), each representing one finger gate and two sources/drains adjacent to the finger gate in the finger-type PMOS transistor. Rectangle 1 indicates a portion of the finger-type NMOS transistor and a portion of the finger-type PMOS transistor not used as a driver because the gates of the PMOS and NMOS transistors therein are respectively connected to power rail Vcc1 and Vss1, making themselves closed. Rectangle 2 indicates a portion of the finger-type NMOS transistor and a portion of the finger-type PMOS transistor used as a driver, in which the PMOS or NMOS transistors therein are switched to drive according to signals from pre-drivers 11 and 13. Hereinafter, rectangles 1 and 2 are referred as non-used and used parts of a post driver, respectively. No matter whether used as a driver, NMOS transistors NMOS1-NMOSn and PMOS transistors PMOS1-PMOSn should provide ESD protection at the same time during an ESD event, theoretically.
The I/O circuit may be problematic in view of ESD protection. As known in the art, the gate voltage of a MOS transistor affects the triggering voltage of the parasitic BJT under the gate. When a high electrostatic voltage relatively positive to a grounded power rail Vss1 zaps the pad in FIG. 1, for example, the gate voltage on the finger gates of NMOS1-NMOSk transistors is in a ground voltage, but that on the finger gates of NMOSk+1-NMOSn might be different from the ground voltage. As a result, BJTs under NMOS1-NMOSk transistors may have a triggering voltage different from those under NMOSk+1-NMOSn transistors. It implies that even though a finger-type NMOS transistor is used for ESD protection, this scheme of ESD protection is inefficient because not all BJTs in the finger-type NMOS transistor participate at the same time to discharge ESD current.